Lateral diffused metal-oxide-semiconductor field effect transistors (LDMOS transistors) are often utilized for high-voltage applications. Thus, it is desirable that LDMOS transistors possess higher breakdown voltages in order to support other electrical devices that operate at high voltages. Breakdown voltage is the voltage level at which an uncontrollable increase in current through the LDMOS transistor occurs. Advancements are continuously being made in the technology for fabrication of semiconductors, and the advancements are resulting in smaller LDMOS transistors with reduced on-resistance and enhanced circuit performance. However, a reduction of on-resistance can lead to a reduction of breakdown voltage. A reduction of breakdown voltage diminishes the utility and performance of LDMOS transistors in high-voltage applications. Accordingly, there is a tradeoff between lower on-resistance and higher breakdown voltage. An object of the present invention is to reduce on-resistance and maintain higher breakdown voltages for LDMOS transistors, which sustains the utility and performance of the LDMOS transistors in high-voltage applications.